Support for parallel access in nand chips

[Thomas Gleixner]

On Tuesday, 26. February 2002 07:30, Radu Corlan wrote:
> On our application (a PPC405 embedded system), we use two TC58256 NAND
> chips conected on a 16-bit bus. we designed it this way in order to
> increase the read/write speed - it would double our bandwidth. The
> problem, of course, is that nand.c only accesses the flash 8 bits at a
> time.
>
> We intend to hack nand.c to use the 16-bit access (and make a special
> entry in nand_chip with a double erase_size), but i'd like to know if
> anybody thought of supporting the parallel access.
No. 
But please don't hack nand.c. Build a nand16.c from nand.c and hack this. 
Else we get a mess in the code, which was cleaned up a few days ago :)
And a lot of overhead of 8/16bit decisions. You just have to provide the same 
functionality as nand.c. You will not need a special entry in nand_chip. The 
information there is enough. 

-- 
Thomas
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Thomas Gleixner, autronix automation GmbH
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