Support for parallel access in nand chips

[Radu Corlan]

On our application (a PPC405 embedded system), we use two TC58256 NAND
chips conected on a 16-bit bus. we designed it this way in order to
increase the read/write speed - it would double our bandwidth. The
problem, of course, is that nand.c only accesses the flash 8 bits at a
time.

We intend to hack nand.c to use the 16-bit access (and make a special
entry in nand_chip with a double erase_size), but i'd like to know if
anybody thought of supporting the parallel access.

Radu

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Radu Corlan           Snail Mail: Bucuresti sect. 1, 
rcorlan at pcnet.ro             str. Argentina nr. 28, 71206 Romania

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