Intel sez: Synchronous Flash and XIP is the future -- thought s?

Paul Nash paulnash at
Mon Dec 16 05:11:50 EST 2002

Actually, Intel's L18/L30 series of "wireless flash" has that feature,
Read-while-erase-or-write as long as the reads are not to the 8MBit
partition being dealt with in an erase or write.

But I agree with the points made here. :-)  I'm sure the above costs even
more... ;-)


-----Original Message-----
From: David Woodhouse [mailto:dwmw2 at]
Sent: Monday, December 16, 2002 1:39 AM
To: Wolfgang Denk
Cc: Paul Nash; Linux-MTD (E-mail)
Subject: Re: Intel sez: Synchronous Flash and XIP is the future --

wd at said:
> Also you might find problems running recent (and future)  kernels  in
> XIP  mode  -  the kernel text segment is often not exactly read-only.
> Especially when you use one f the existing real-time extensions  (but
> not only then). It seems the amount of tweaking that is necessary for
> XIP  is  growing  with  each new kernel release - to a level where it
> becomes impractical. 

Also true. Of course we have to distinguish between XIP of file system 
pages and of the kernel -- I was ignoring the latter because it's even less 
sane than the former. If you ever want to write to the chip, you have to 
disable all interrupts and wait while the chip is busy. For up to 20 
seconds, in the case of a slow erase.

Of course, you could poll the interrupt controller while polling the flash
for completion, and suspend the flash operation to service pending
interrupts if they happen -- but that's really not the kind of thing that
should be encouraged. Until people start making flash chips were every part 
of the chip other than the part which is being erased/written is readable 
during an erase or write operation, XIP is just a silly buzzword, for any 
writable application.


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