Oh, the many joys of MTD...

[Alice Hennessy]

Kevin Jacobs wrote:

> On Thu, 8 Mar 2001, Vipin Malik wrote:
> > > The device mapping is done with the ioremap() call which is responsible for
> > > providing a non-cacheable mapping.
> >
> > Actually I had to use ioremap_nocache() call with my ELANSC520 processor
> > (which has a processor I&D cache). This is even with caching actually
> > disabled for the flash banks inside the processor (by the startup
> > processor init code).
>
> This is exactly the configuration I have -- its a Lineo SecureEdge (NETtel)
> 2580 which is based on an AMD Elan SC520 chip.
>
> > Does ioremap() do any caching of it's own? What's the diff between the two?
>
> The difference is:
>
> extern inline void * ioremap (unsigned long offset, unsigned long size)
> {
>         return __ioremap(offset, size, 0);
> }
>
> and
>
> extern inline void * ioremap_nocache (unsigned long offset, unsigned long size)
> {
>         return __ioremap(offset, size, _PAGE_PCD);
> }
>
> This in turn adds _PAGE_PCD to the set_pte() call in __ioremap.  This turns
> off the page cache for the mapped area.  I'm still not sure why this matters
> though I think its inspired me to re-read the literature on the fiddly bits
> of i386 architecture.
>
> -Kevin
>
> --
> Kevin Jacobs
> The OPAL Group - Enterprise Systems Architect
> Voice: (216) 986-0710 x 19         E-mail: jacobs at theopalgroup.com
> Fax:   (216) 986-0714              WWW:    http://www.theopalgroup.com
>
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Looks like ioremap is implemented inconsistently over the architectures.  Both
mips
and ppc return no-cache addresses for ioremap at the moment.  i386 looks like it
doesn't.
Perhaps ioremap_nocache is the way to go.

Alice




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