CFI problems with 32bit bus and 4 devices

David Woodhouse dwmw2 at infradead.org
Wed Jan 10 17:35:42 EST 2001


On Wed, 10 Jan 2001, [iso-8859-1] Stéphane Laroche wrote:

> Although using buswidth == 8 in that specific case may work in that specific
> case, you would read 4 bytes too many, which are invalid addresses for
> 16bit/32bit CFI devices in x8 mode (I guess nothing bad happens by reading
> those but you never know).

I'd expect the chips to just ignore the A0 line completely, so those
addresses are just aliases for the first 4 bytes. And I think that the
whole point in the map driver was to eliminate such aliasing and stuff,
and just to present the address space of the chip linearly.

It's arguable either way, really - perhaps you could claim that the CFI
code ought to know about such things and _expect_ the LSbit of the
'offset' it passes to the map driver to be equivalent to the A0 line of
the chip, even if the A0 line of the chip isn't valid. But I think doing
it in the map driver keeps the code simpler, and is probably worth it.
Shifts are cheap enough, aren't they?



NB: Some time in the future I may optimise away some of the map drivers'
access functions in certain cases - so many of them are so trivial, and so
many people compile with only one map driver.

#ifdef MAP_DRIVER_OPTIMISE_HACK
#define MAP_WRITE8(map, d, ofs) do { *(__u8 *)map->map_priv_1 + ofs = d } while(0)
#else
#define MAP_WRITE8(map, d, ofs) map->write8(map, d, ofs)

etc.

For this case, it'd be
#define MAP_WRITE32(map, d, ofs) do { *(__u32 *)map->map_priv_1 + (ofs>>1) = d } while(0)

At that point, you'd have the shift in the same function block as the
original calculation of 'ofs' and it ought to get completely optimised
away anyway.

-- 
dwmw2




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