CFI problems with 32bit bus and 4 devices

[Nicolas Pitre]

On Wed, 10 Jan 2001, David Woodhouse wrote:

> On Wed, 10 Jan 2001, [iso-8859-1] Stéphane Laroche wrote:
>
> > So, for my setup, which has 4 x16 devices on a 32 bit bus (AMDs),  the
> > CFI query structure is located at offsets 0x80, 0x88, 0x90, etc.
> >
> > cfi_read_query()  uses only the buswidth to calculate the offset, which
> > is not general enough (it used to be like that before I played with the
> > code a bit last summer).  It's obviously wrong in my case ( 0x10 << 2 !=
> > 0x80 ).
>
> Sorry, mea culpa. I'd forgotten - or just didn't realise this arrangement
> was used. How did {amd,cfi}_send_gen_cmd() send a command to all four
> chips? With two separate 32-bit writes?

No.  Usually the actual x16 flash devices are able to operate in 8-bit mode
(selected with a pin tied to VCC or GND I think).  Then you route four of
them in parallel on a 32-bit bus.  So in this case buswidth=4, interleave=4,
chip_type=2.  That was the case that needed to be fixed for the Intel write
buffer size lately.


Nicolas



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