Supported flash memory (fwd)

[David Woodhouse]

forwarded by request,

--
dwmw2

------- Forwarded Message

Date: Fri, 05 Jan 2001 09:23:26 -0700 (MST)
From: Russ.Dill at asu.edu
Subject: Re: Supported flash memory
To: David Woodhouse <dwmw2 at infradead.org>

Quoting David Woodhouse <dwmw2 at infradead.org>:

> 
> Russ.Dill at asu.edu said:
> >  Besides footprints, pinouts, etc, my other concern is software. The
> > logical combination would seem to be blob/mtd. What flash products
> are
> > known or probable to be compatible with this combination, what should
> > I look for to attempt to assertain compatibilty? Does blob/mtd work
> > transparently with a 16bit or 32bit ROM bus? 
> 
> The MTD code ought to work with any CFI-compliant flash chip from Intel
> or 
> AMD, and with a few others too. In most combinations of bus size / 
> interleave.
> 
> I don't know about blob, but RedBoot should support most of the flash 
> setups you're likely to encounter, too.

What about flashes that say they have CUI (Command user interface) and SR
(Status register)? 

what are CFI commands? are they 8bit, 16bit? if you have 2 chips giving you a
32bit databus, does it write out the same command on the high lane and the low
lane? 

I've noticed LART connects address and data lines to flash in  positions most
convienent to route. Does this break any CFI functionality?


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