sharp driver dissimilarities

[David Schleef]

On Sat, Apr 28, 2001 at 05:11:57PM +0100, David Woodhouse wrote:
> 
> ds at schleef.org said:
> >  I tried and failed, but that may be just my lack of understanding of
> > the CFI driver.  The commands, command write locations, and status
> > bits have no similarity to other chip drivers.
> 
> The commands certainly have some similarity with the cfi_cmdset_0001 code, 
> which isn't particularly surprising as command set 0001 is 'Intel/Sharp'.

Heh...

> However, at the time you did sharp.c, I believe that CFI code wasn't 
> sufficiently generic to deal with 4x8-bit chips. It ought to manage that 
> now, though.

I'm not sure that was the case.  I'd chalk it up to be not being
very observant.

I actually started from the cfi_cmdset_0001.c driver.  In the
process, I noticed a few things that I don't like about it.

The write process uses word_write_time and adjusts it so that it
settles at the average write time.  The problem with that
method is that half the time, you will be sleeping for 10 ms
on something that may finish in 1 more usec of waiting.  Not
pretty.  The sharp driver write speed went up by a factor of
about 10 when I fixed that.  It just uses the braindead "spin
on the status register" for ~100 us.  Perhaps some kind of
hybrid is better, but schedule_timeout is a significant
performance hit.

A similar thing is true about block erase -- the schedule_timeout(HZ)
means that the earliest time the driver will notice that the
chip is done erasing is 1 s.

I also didn't understand how the locking was supposed to work,
so I rewrote it in the sharp driver.  I like it better.

On the other hand, of course, the sharp driver only handles
one interleve.





dave...



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