mtd: nand: fsl_ifc: Read ECCSTAT0 and ECCSTAT1 registers for IFC 2.0
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Fri Mar 23 00:59:02 PDT 2018
Gitweb: http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=6b00c35138b404be98b85f4a703be594cbed501c
Commit: 6b00c35138b404be98b85f4a703be594cbed501c
Parent: 843c3a59997f18060848b8632607dd04781b52d1
Author: Jagdish Gediya <jagdish.gediya at nxp.com>
AuthorDate: Thu Mar 22 01:08:10 2018 +0530
Committer: Boris Brezillon <boris.brezillon at bootlin.com>
CommitDate: Wed Mar 21 10:22:28 2018 +0100
mtd: nand: fsl_ifc: Read ECCSTAT0 and ECCSTAT1 registers for IFC 2.0
Due to missing information in Hardware manual, current
implementation doesn't read ECCSTAT0 and ECCSTAT1 registers
for IFC 2.0.
Add support to read ECCSTAT0 and ECCSTAT1 registers during
ecccheck for IFC 2.0.
Fixes: 656441478ed5 ("mtd: nand: ifc: Fix location of eccstat registers for IFC V1.0")
Cc: stable at vger.kernel.org # v3.18+
Signed-off-by: Jagdish Gediya <jagdish.gediya at nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
Signed-off-by: Boris Brezillon <boris.brezillon at bootlin.com>
---
drivers/mtd/nand/fsl_ifc_nand.c | 6 +-----
include/linux/fsl_ifc.h | 6 +-----
2 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index fae01b04abc7..5a9c2f0020c2 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -227,11 +227,7 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
int sector_end = sector_start + chip->ecc.steps - 1;
__be32 *eccstat_regs;
- if (ctrl->version >= FSL_IFC_VERSION_2_0_0)
- eccstat_regs = ifc->ifc_nand.v2_nand_eccstat;
- else
- eccstat_regs = ifc->ifc_nand.v1_nand_eccstat;
-
+ eccstat_regs = ifc->ifc_nand.nand_eccstat;
eccstat = ifc_in32(&eccstat_regs[sector_start / 4]);
for (i = sector_start; i <= sector_end; i++) {
diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h
index c332f0a45607..3fdfede2f0f3 100644
--- a/include/linux/fsl_ifc.h
+++ b/include/linux/fsl_ifc.h
@@ -734,11 +734,7 @@ struct fsl_ifc_nand {
u32 res19[0x10];
__be32 nand_fsr;
u32 res20;
- /* The V1 nand_eccstat is actually 4 words that overlaps the
- * V2 nand_eccstat.
- */
- __be32 v1_nand_eccstat[2];
- __be32 v2_nand_eccstat[6];
+ __be32 nand_eccstat[8];
u32 res21[0x1c];
__be32 nanndcr;
u32 res22[0x2];
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