x86/cpufeatures: Add Intel PCONFIG cpufeature

Linux-MTD Mailing List linux-mtd at lists.infradead.org
Mon Mar 19 02:59:07 PDT 2018


Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=7958b2246fadf54b7ff820a2a5a2c5ca1554716f
Commit:     7958b2246fadf54b7ff820a2a5a2c5ca1554716f
Parent:     1da961d72ab0cfbe8b7c26cba731dc2bb6b9494b
Author:     Kirill A. Shutemov <kirill.shutemov at linux.intel.com>
AuthorDate: Mon Mar 5 19:25:51 2018 +0300
Committer:  Ingo Molnar <mingo at kernel.org>
CommitDate: Mon Mar 12 12:09:53 2018 +0100

    x86/cpufeatures: Add Intel PCONFIG cpufeature
    
    CPUID.0x7.0x0:EDX[18] indicates whether Intel CPU support PCONFIG instruction.
    
    Signed-off-by: Kirill A. Shutemov <kirill.shutemov at linux.intel.com>
    Cc: Dave Hansen <dave.hansen at intel.com>
    Cc: Kai Huang <kai.huang at linux.intel.com>
    Cc: Linus Torvalds <torvalds at linux-foundation.org>
    Cc: Peter Zijlstra <peterz at infradead.org>
    Cc: Thomas Gleixner <tglx at linutronix.de>
    Cc: Tom Lendacky <thomas.lendacky at amd.com>
    Cc: linux-mm at kvack.org
    Link: http://lkml.kernel.org/r/20180305162610.37510-4-kirill.shutemov@linux.intel.com
    Signed-off-by: Ingo Molnar <mingo at kernel.org>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 16898eb813f5..d554c11e01ff 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -329,6 +329,7 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
 #define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */
 #define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
+#define X86_FEATURE_PCONFIG		(18*32+18) /* Intel PCONFIG */
 #define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
 #define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */



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