x86/cpufeatures: Add Intel Total Memory Encryption cpufeature

Linux-MTD Mailing List linux-mtd at lists.infradead.org
Mon Mar 19 02:59:06 PDT 2018


Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=1da961d72ab0cfbe8b7c26cba731dc2bb6b9494b
Commit:     1da961d72ab0cfbe8b7c26cba731dc2bb6b9494b
Parent:     c07a8f8b08ba683ea24f3ac9159f37ae94daf47f
Author:     Kirill A. Shutemov <kirill.shutemov at linux.intel.com>
AuthorDate: Mon Mar 5 19:25:49 2018 +0300
Committer:  Ingo Molnar <mingo at kernel.org>
CommitDate: Mon Mar 12 12:09:53 2018 +0100

    x86/cpufeatures: Add Intel Total Memory Encryption cpufeature
    
    CPUID.0x7.0x0:ECX[13] indicates whether CPU supports Intel Total Memory
    Encryption.
    
    Signed-off-by: Kirill A. Shutemov <kirill.shutemov at linux.intel.com>
    Cc: Dave Hansen <dave.hansen at intel.com>
    Cc: Kai Huang <kai.huang at linux.intel.com>
    Cc: Linus Torvalds <torvalds at linux-foundation.org>
    Cc: Peter Zijlstra <peterz at infradead.org>
    Cc: Thomas Gleixner <tglx at linutronix.de>
    Cc: Tom Lendacky <thomas.lendacky at amd.com>
    Cc: linux-mm at kvack.org
    Link: http://lkml.kernel.org/r/20180305162610.37510-2-kirill.shutemov@linux.intel.com
    Signed-off-by: Ingo Molnar <mingo at kernel.org>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f41079da38c5..16898eb813f5 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -316,6 +316,7 @@
 #define X86_FEATURE_VPCLMULQDQ		(16*32+10) /* Carry-Less Multiplication Double Quadword */
 #define X86_FEATURE_AVX512_VNNI		(16*32+11) /* Vector Neural Network Instructions */
 #define X86_FEATURE_AVX512_BITALG	(16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB instructions */
+#define X86_FEATURE_TME			(16*32+13) /* Intel Total Memory Encryption */
 #define X86_FEATURE_AVX512_VPOPCNTDQ	(16*32+14) /* POPCNT for vectors of DW/QW */
 #define X86_FEATURE_LA57		(16*32+16) /* 5-level page tables */
 #define X86_FEATURE_RDPID		(16*32+22) /* RDPID instruction */



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