Documentation: atmel-quadspi: add binding file for Atmel QSPI driver

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=7ddf7c1ea77d10424ae5dfa3c3a4d6a39cdf70a9
Commit:     7ddf7c1ea77d10424ae5dfa3c3a4d6a39cdf70a9
Parent:     e523f11141bdc24f65775f0b1fa4a7ed404e68cc
Author:     Cyrille Pitchen <cyrille.pitchen at atmel.com>
AuthorDate: Mon Jun 13 17:10:25 2016 +0200
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Wed Jul 13 18:01:53 2016 -0700

    Documentation: atmel-quadspi: add binding file for Atmel QSPI driver
    
    This patch documents the DT bindings for the driver of the Atmel QSPI
    controller embedded inside sama5d2x SoCs.
    
    Signed-off-by: Cyrille Pitchen <cyrille.pitchen at atmel.com>
    Acked-by: Rob Herring <robh at kernel.org>
    Acked-by: Nicolas Ferre <nicolas.ferre at atmel.com>
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 .../devicetree/bindings/mtd/atmel-quadspi.txt      | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt
new file mode 100644
index 0000000..4898070
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt
@@ -0,0 +1,32 @@
+* Atmel Quad Serial Peripheral Interface (QSPI)
+
+Required properties:
+- compatible:     Should be "atmel,sama5d2-qspi".
+- reg:            Should contain the locations and lengths of the base registers
+                  and the mapped memory.
+- reg-names:      Should contain the resource reg names:
+                  - qspi_base: configuration register address space
+                  - qspi_mmap: memory mapped address space
+- interrupts:     Should contain the interrupt for the device.
+- clocks:         The phandle of the clock needed by the QSPI controller.
+- #address-cells: Should be <1>.
+- #size-cells:    Should be <0>.
+
+Example:
+
+spi at f0020000 {
+	compatible = "atmel,sama5d2-qspi";
+	reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
+	reg-names = "qspi_base", "qspi_mmap";
+	interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
+	clocks = <&spi0_clk>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spi0_default>;
+	status = "okay";
+
+	m25p80 at 0 {
+		...
+	};
+};