[PATCH v4 1/3] spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND

[Benjamin Larsson]

Hi.

On 11/25/25 08:18, Andy Shevchenko wrote:
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>
> On Tue, Nov 25, 2025 at 05:10:49AM +0300, Mikhail Kshevetskiy wrote:
>> Airoha EN7523 specific bug
>> --------------------------
>> We found that some serial console may pull TX line to GROUND during board
>> boot time. Airoha uses TX line as one of it's BOOT pins.
> I know the term bootstrap, what does BOOT mean?
>
>> On the EN7523 SoC this may lead to booting in RESERVED boot mode.
>>
>> It was found that some flashes operates incorrectly in RESERVED mode.
>> Micron and Skyhigh flashes are definitely affected by the issue,
>> Winbond flashes are NOT affected.
> NOT --> not

The following pdf:

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/196/BQ25792QMR_5F00_Schematic-Review-2.pdf

lists the SoC strapping pins for configuring the boot options (EN7529 is 
in the same SoC family as EN7523).

In page 1, the "EN7529DT Hardware Trap" one can see that b010 maps 
to "SPI NAND dummy prepend". In other (later?) version of the schematics 
and datasheets this is changed to "Reserved".

It is assumed that this errata was handled by just updating the 
documentation to not use this mode on designs with incompatible spi-nand 
flashes.

MvH

Benjamin Larsson