[RESEND PATCH v4] arm64: dts: mt8195: Add Ethernet controller

Biao Huang (黄彪) Biao.Huang at mediatek.com
Wed Dec 21 17:56:16 PST 2022


Dear Andrew,
	Thanks for your comments~

On Wed, 2022-12-21 at 14:16 +0100, Andrew Lunn wrote:
> > +&eth {
> > +	phy-mode ="rgmii-rxid";
> 
> That is pretty unusual. You don't see rxid, or txid very often, it is
> normally rgmii, or rgmii-id.
We didn't notice that, and in our design, we can ensure 2ns delay in tx
direction, so we pick rgmii-rxid.
Theoretically, we should support all the cases, and we'll set phy-mode
to "rgmii-id" in next send.
> 
> > +	phy-handle = <&ethernet_phy0>;
> > +	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
> > +	snps,reset-delays-us = <0 10000 10000>;
> > +	mediatek,tx-delay-ps = <2030>;
> 
> How important is the 30 here?
As documented in yaml, "For MT8188/MT8195 RGMII/RMII/MII interface,
Allowed value need to be a multiple of 290, or will round down. Range
0~31*290.
"
so the 2030 is chosen here.
> 
> You appear to have the PHY doing the RX delay, and the MAC doing the
> TX delay. Normally we have the PHY do both. Can you actually do
> 
> phy-mode = "rgmii-id", and mediatek,tx-delay-ps = <30> ? That would
> then have the PHY doing the basic 2ns delay, and the MAC doing the
> fine tuning needed for TX?
Yes, we can do phy-mode = "rgmii-id".
DTS and driver modification will send together in next send.
Thanks for your valuable comments~
> 
>      Andrew


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