[PATCH 7/8] pinctrl: renesas: rzg2l: Add RZ/G3L support for selecting I3C power source

[Diogo Ivo]

The Renesas RZ/G3L I3C pins can be powered at either 1.8V or 1.2V.  The
pin controller provides a register to select between these two options.
On RZ/G3L the I3C signals are multiplexed on the P2 port pins.  Update
the Renesas RZ/G2L pin controller driver to allow selecting the I3C
power source on RZ/G3L SoC.

Signed-off-by: Diogo Ivo <diogo.ivo.sx at renesas.com>
---
 drivers/pinctrl/renesas/pinctrl-rzg2l.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index f73d273df362..192da9f9a55d 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -2431,7 +2431,8 @@ static const char * const rzg3l_gpio_names[] = {
 static const u64 r9a08g046_gpio_configs[] = {
 	0x0,
 	0x0,
-	RZG2L_GPIO_PORT_PACK(2, 0x22, PIN_CFG_NF | PIN_CFG_IEN),	/* P2 */
+	RZG2L_GPIO_PORT_PACK(2, 0x22, PIN_CFG_NF | PIN_CFG_IEN |
+				      PIN_CFG_IO_VMC_I3C),		/* P2 */
 	RZG2L_GPIO_PORT_PACK(7, 0x23, RZG3L_MPXED_PIN_FUNCS_POC(A, AWO)), /* P3 */
 	0x0,
 	RZG2L_GPIO_PORT_PACK(7, 0x25, RZG3L_MPXED_PIN_FUNCS_POC(A, ISO)), /* P5 */
@@ -3933,10 +3934,12 @@ static const struct rzg2l_hwcfg rzg3l_hwcfg = {
 		.sd_ch = 0x3004,
 		.sd_ch2 = 0x3024,
 		.eth_poc = 0x3010,
+		.i3c_set = 0x301c,
 		.oen = 0x3018,
 		.other_poc = 0x3028,
 	},
 	.masks = {
+		.i3c_set_poc = BIT(2),
 		.other_poc_pvdd1833_oth_awo_poc = BIT(0),
 		.other_poc_pvdd1833_oth_iso_poc = BIT(1),
 		.other_poc_wdtovf_n_poc = BIT(2),

-- 
2.56.0