[PATCH v6 4/5] ARM: dts: microchip: add I3C controller

[Claudiu Beznea]

Hi, Manikandan,

On 5/7/26 11:48, Manikandan Muralidharan wrote:
> From: Durai Manickam KR <durai.manickamkr at microchip.com>
> 
> Add I3C controller for sama7d65 SoC.
> 
> Signed-off-by: Durai Manickam KR <durai.manickamkr at microchip.com>
> Signed-off-by: Manikandan Muralidharan <manikandan.m at microchip.com>
> ---
> Changes in v3:
> - Remove clock-names property as driver enables the clk in bulk
> 
>   arch/arm/boot/dts/microchip/sama7d65.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> index 67253bbc08df..ec200848c153 100644
> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> @@ -1055,5 +1055,13 @@ gic: interrupt-controller at e8c11000 {
>   			#address-cells = <0>;
>   			interrupt-controller;
>   		};
> +
> +		i3c: i3c at e9000000 {
> +			compatible = "microchip,sama7d65-i3c-hci";
> +			reg = <0xe9000000 0x300>;

 From manual at [1] I see the size of I3CC region is 0x1000. Unless that is 
wrong I think we should use 0x1000 to properly describe de HW. Please let me 
know and I can do it while applying.

Thank you,
Claudiu

[1] 
https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7D6-Series-Data-Sheet-DS60001851.pdf

> +			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 105>, <&pmc PMC_TYPE_GCK 105>;
> +			status = "disabled";
> +		};
>   	};
>   };