[PATCH v3 1/5] i3c: mipi-i3c-hci: Allow only relevant INTR_STATUS bit updates

Jarkko Nikula jarkko.nikula at linux.intel.com
Wed Apr 23 00:37:11 PDT 2025


Hi Frank

On 4/9/25 5:03 PM, Jarkko Nikula wrote:
> Since MIPI I3C HCI specification version v0.8 INTR_STATUS bits 9:0 are
> reserved. Version v0.5 has bits 9 and 5:0 in use but not handled by the
> current driver code and not needed in DMA transfers.
> 
> PIO transfers with v0.5 would require changes to both
> core.c: i3c_hci_irq_handler() and pio.c: hci_pio_irq_handler() though.
> 
> For these reasons don't enable signal updates from INTR_STATUS bits 9:0.
> 
> It allow to get rid of "unexpected INTR_STATUS" error messages on old
> v0.5 IP version and is a no-op for later versions starting from v0.8.
> 
> Signed-off-by: Jarkko Nikula <jarkko.nikula at linux.intel.com>
> ---
> v3: Changed the last commit log sentence and clarified more the comment
> about INTR_STATUS_ENABLE signal updates according to Frank Li's suggestion.
> ---
>   drivers/i3c/master/mipi-i3c-hci/core.c | 9 +++++++--
>   1 file changed, 7 insertions(+), 2 deletions(-)
> 
Was this and patch 3/5 now ok in your point of view?



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