[PATCH v1 7/8] iommu: Park TDISP T=0 devices in the blocking domain

Nicolin Chen nicolinc at nvidia.com
Wed Oct 28 11:51:38 PDT 2026


On Wed, Oct 28, 2026 at 12:09:09PM -0300, Jason Gunthorpe wrote:
> On Wed, Oct 28, 2026 at 02:19:17PM +0000, Shameer Kolothum Thodi wrote:
> > > +	/*
> > > +	 * When in T=0 mode the T=1 vIOMMU must always be set to
> > > BLOCKED to
> > > +	 * release control of ATS.
> > > +	 */
> > > +	if (iommu_using_t0_stream(first)) {
> > > +		if (!ops->blocked_domain)
> > > +			return ERR_PTR(-EINVAL);
> > > +		return ops->blocked_domain;
> > 
> > How is MSI allocation handled for T=0 devices? The ITS calls
> > iommu_dma_prepare_msi(), which appears to return -EOPNOTSUPP
> > for the blocked domain. Is that intentional?
> 
> For a TDISP capable devince MSI is always issued using T=0, meaning it
> does not go through the SMMU. It should be wired to defeat
> iommu_dma_prepare_msi() and use an identity IOVA as though there is no
> iommu present..

I'll fold this in:

------------------------------------------------------------
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index d6b00e0373f5c..1474224c2565f 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -4324,8 +4324,9 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr)
 		return 0;
 
 	mutex_lock(&group->mutex);
-	/* An IDENTITY domain must pass through */
-	if (group->domain && group->domain->type != IOMMU_DOMAIN_IDENTITY) {
+	/* An IDENTITY domain or a T=0 device must pass through */
+	if (group->domain && group->domain->type != IOMMU_DOMAIN_IDENTITY &&
+	    !iommu_using_t0_stream(dev)) {
 		switch (group->domain->cookie_type) {
 		case IOMMU_COOKIE_DMA_MSI:
 		case IOMMU_COOKIE_DMA_IOVA:
------------------------------------------------------------

Thanks
Nicolin



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