[PATCH v7 02/16] arm64: ras: Add probe/remove for arm64_ras driver
Robin Murphy
robin.murphy at arm.com
Fri Oct 23 05:09:27 PDT 2026
On 23/10/2026 10:59 am, Umang Chheda wrote:
> Hello Ruidong,
>
> On 6/2/2026 12:45 PM, Ruidong Tian wrote:
>> Introduce the back-end platform driver that binds to the devices
>> created by the AEST front-end. Driver input is taken exclusively from
>> fwnode properties, so the same probe path serves any future front-end
>> (DT, hand-rolled) without conditional code.
>>
>> The probe builds two layers of state:
>>
>> - struct ras_node: one AEST error source
>> - struct ras_record: one error record inside a node
>>
>> This split mirrors the hardware: a node owns the shared MMIO/ERRGSR
>> window and policy, while records are the unit at which errors are
>> reported, masked and polled. Later patches plug interrupts, decoding,
>> storm mitigation and userspace ABI onto these two objects without
>> touching the front-end.
>>
>> Signed-off-by: Umang Chheda <umang.chheda at oss.qualcomm.com>
>> Signed-off-by: Ruidong Tian <tianruidong at linux.alibaba.com>
>> ---
> [...]
>
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +
>> +obj-$(CONFIG_ARM64_RAS_DRIVER) += arm64_ras.o
>> +
>> +arm64_ras-y := ras-core.o
>> diff --git a/drivers/ras/arm64/ras-core.c b/drivers/ras/arm64/ras-core.c
>> new file mode 100644
>> index 000000000000..b5448f4a841f
>> --- /dev/null
>> +++ b/drivers/ras/arm64/ras-core.c
>> @@ -0,0 +1,266 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * ARM Error Source Table Support
>> + *
>> + * Copyright (c) 2025, Alibaba Group.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/ras.h>
>> +
>> +#include "ras.h"
>> +
>> +#undef pr_fmt
>> +#define pr_fmt(fmt) "arm64_ras: " fmt
>> +
>> +static const char *const ras_node_name[] = {
>> + [ACPI_AEST_PROCESSOR_ERROR_NODE] = "processor",
>> + [ACPI_AEST_MEMORY_ERROR_NODE] = "memory",
>> + [ACPI_AEST_SMMU_ERROR_NODE] = "smmu",
>> + [ACPI_AEST_VENDOR_ERROR_NODE] = "vendor",
>> + [ACPI_AEST_GIC_ERROR_NODE] = "gic",
>> + [ACPI_AEST_PCIE_ERROR_NODE] = "pcie",
>> + [ACPI_AEST_PROXY_ERROR_NODE] = "proxy",
>> +};
>
> Now that the ARM RAS core framework is shared by both ACPI and DT
> platforms, should we consider dropping the "ACPI_AEST" naming in the
> common code and replacing it with a more generic prefix maybe something
> like "ARM_RAS" ?
But these names and values _are_ defined by AEST (literally "AEST node
type", see table 4 in DEN0085) - they are not part of the RAS
architecture itself. Even if you exactly copy all the AEST concepts into
a DT binding, it doesn't really make them "common", it just means you've
defined a DT binding in terms of what are still AEST definitions.
Thanks,
Robin.
> [...]
>> +
>> +const struct ras_group ras_group_config[] = {
>> + [ACPI_AEST_NODE_GROUP_FORMAT_4K] = {
>> + .errgsr_num = ERXGROUP_4K_ERRGSR_NUM,
>> + .size = ERXGROUP_4K_SIZE,
>> + .errgsr_offset = ERXGROUP_4K_OFFSET,
>> + },
>> + [ACPI_AEST_NODE_GROUP_FORMAT_16K] = {
>> + .errgsr_num = ERXGROUP_16K_ERRGSR_NUM,
>> + .size = ERXGROUP_16K_SIZE,
>> + .errgsr_offset = ERXGROUP_16K_OFFSET,
>> + },
>> + [ACPI_AEST_NODE_GROUP_FORMAT_64K] = {
>> + .errgsr_num = ERXGROUP_64K_ERRGSR_NUM,
>> + .size = ERXGROUP_64K_SIZE,
>> + .errgsr_offset = ERXGROUP_64K_OFFSET,
>> + },
>> +};
>> +
> Thanks,
> Umang
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