[PATCH v11 09/16] iommu/arm-smmu-v3: Restore MSI config on resume

[Will Deacon]

On Tue, Sep 29, 2026 at 03:45:03AM +0000, Pranjal Shrivastava wrote:
> The SMMU's MSI configuration registers (*_IRQ_CFGn) containing target
> address, data and memory attributes lose their state when the SMMU is
> powered down.
> 
> Introduce arm_smmu_resume_msis() to zero the *_IRQ_CFG0 registers (which
> reset to unknown values) and restore the cached MSI messages across the
> device's MSI domain via msi_device_domain_restore_msi_msgs().
> 
> In addition, clear ARM_SMMU_FEAT_MSI if MSI setup fails and the driver
> falls back to wired IRQs, preventing spurious MSI resume attempts.
> 
> Reviewed-by: Nicolin Chen <nicolinc at nvidia.com>
> Reviewed-by: Mostafa Saleh <smostafa at google.com>
> Signed-off-by: Pranjal Shrivastava <praan at google.com>
> ---
>  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index dc2fc02b5163..7347d3ecdae8 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -4779,6 +4779,19 @@ static void arm_smmu_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
>  	writel_relaxed(ARM_SMMU_MEMATTR_DEVICE_nGnRE, smmu->base + cfg[2]);
>  }
>  
> +static void __maybe_unused arm_smmu_resume_msis(struct arm_smmu_device *smmu)
> +{
> +	/* Clear the MSI address regs as they reset to unknown value */
> +	writeq_relaxed(0, smmu->base + ARM_SMMU_GERROR_IRQ_CFG0);
> +	writeq_relaxed(0, smmu->base + ARM_SMMU_EVTQ_IRQ_CFG0);
> +
> +	if (smmu->features & ARM_SMMU_FEAT_PRI)
> +		writeq_relaxed(0, smmu->base + ARM_SMMU_PRIQ_IRQ_CFG0);

Please can you factor this out into a separate function (e.g.
arm_smmu_reset_msis()) that can also be called from setup_msis()?

Will