[PATCH 0/5] Add PWM support for Cadence TTC

[Meher Thanmaiee]

The Cadence Triple Timer Counter (TTC) IP found on Xilinx Zynq,
ZynqMP, and Versal SoCs provides three timer channels per instance.
The existing TTC driver supports clocksource and clockevent use.
This series adds support for using a TTC instance as a three-channel
PWM controller, with the interval counter defining the period and
the match counter defining the duty cycle.

For TTC nodes containing #pwm-cells, the timer driver creates an
auxiliary-bus child device instead of registering the instance as a
clocksource/clockevent device. A separate PWM driver binds to the
child and exposes the three channels through the PWM framework.
This reuses the existing "cdns,ttc" compatible and #pwm-cells
binding. Nodes without #pwm-cells continue to use the timer path.

This reworks the earlier TTC PWM series by Mubin Sayyed [1] and
is submitted as a new series because the driver integration has
been redesigned. The earlier series called PWM probe code directly
from the timer driver under a CONFIG_PWM_CADENCE guard, coupling
the timer and PWM paths inside a single probe flow instead of
using separate device binding. During review of that series, an
auxiliary-bus device was suggested to separate the timer and PWM
drivers. This series implements that approach.

The first three patches prepare the TTC timer driver by moving shared
register definitions into a common header, allowing deferred probing,
and factoring out MMIO mapping and timer-width parsing. The remaining
patches add the PWM driver and timer-side auxiliary-device support.

PWM support is limited to TTC instances whose channels use the
shared internal/reference clock. Instances configured to use an
external channel clock are rejected at probe time.

[1] https://lore.kernel.org/all/20250115113556.2832282-1-mubin.sayyed@amd.com/

Signed-off-by: Meher Thanmaiee <meherthanmaiee.vanukuri at amd.com>
---
Meher Thanmaiee (5):
      clocksource: timer-cadence-ttc: Move register definitions to shared header
      clocksource: timer-cadence-ttc: Allow deferred probing
      clocksource: timer-cadence-ttc: Refactor common TTC resource setup
      pwm: cadence: Add TTC PWM driver
      clocksource: timer-cadence-ttc: Add PWM auxiliary-device support

 MAINTAINERS                             |   2 +
 drivers/clocksource/Kconfig             |   5 +
 drivers/clocksource/timer-cadence-ttc.c | 208 +++++++++++++++++++++-------
 drivers/pwm/Kconfig                     |  13 ++
 drivers/pwm/Makefile                    |   1 +
 drivers/pwm/pwm-cadence.c               | 231 ++++++++++++++++++++++++++++++++
 include/linux/timer-cadence-ttc.h       |  74 ++++++++++
 7 files changed, 487 insertions(+), 47 deletions(-)
---
base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a
change-id: 20261005-cadence-ttc-pwm-2cf98b4c696b

Best regards,
--  
Meher Thanmaiee <meherthanmaiee.vanukuri at amd.com>