[PATCH] drivers: altera_edac: Fix OCRAM ECC init for warm reset

Borislav Petkov bp at alien8.de
Sun May 10 13:46:40 PDT 2026


On Sun, May 10, 2026 at 03:31:56PM -0500, Dinh Nguyen wrote:
> 
> 
> On 5/9/26 09:38, muhammad.nazim.amirul.nazle.asmade at altera.com wrote:
> > From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>
> > 
> > The OCRAM ECC is always enabled either by the BootROM or by the
> > Secure Device Manager (SDM) during a power-on reset on SoCFPGA.
> > 
> > However, during a warm reset, the OCRAM content is retained to
> > preserve data, while the control and status registers are reset to
> > their default values. As a result, ECC must be explicitly re-enabled
> > after a warm reset.
> > 
> > Signed-off-by: Niravkumar L Rabara <nirav.rabara at altera.com>
> > Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>

And fix your SOB chain:

https://kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin

>From the above, I have no clue what Niravkumar has done.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette



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