[PATCH v4 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices

[Dan Williams (nvidia)]

Jason Gunthorpe wrote:
> On Fri, May 01, 2026 at 04:27:41PM -0700, Dan Williams (nvidia) wrote:
> 
> > You appear to be confusing Cache_Capable and Cache_Enabled.
> > 
> > "8.2.1.3.1 DVSEC Flex Bus Port Capability" != "8.2.1.3.3 DVSEC Flex Bus Port Status"
> > 
> > Cache_Capable is only a capability. To check that the device has
> > actually trained the CXL.cache alternate protocol you need to look at
> > the status register.
> 
> The capable is probably a reasonable choice here unless you are
> confident the status will never change after the device is first
> discovered? ATS is being set early in the boot sequence.
> 
> It is pretty safe to be over eager with the ATS enablement, less safe
> to get it off when it needs to be on.

True, a reset could turn on CXL.cache. Ok, stick with what you have.

The present state of alternate protocol negotiation is still relevant
though for distinguishing CXL protocol errors from other PCIe AER
"internal" errors.

Need a bit of fixup work for that to refresh the status bit after reset.