[PATCH v4 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices

Jason Gunthorpe jgg at nvidia.com
Fri May 1 16:46:41 PDT 2026


On Fri, May 01, 2026 at 04:27:41PM -0700, Dan Williams (nvidia) wrote:

> You appear to be confusing Cache_Capable and Cache_Enabled.
> 
> "8.2.1.3.1 DVSEC Flex Bus Port Capability" != "8.2.1.3.3 DVSEC Flex Bus Port Status"
> 
> Cache_Capable is only a capability. To check that the device has
> actually trained the CXL.cache alternate protocol you need to look at
> the status register.

The capable is probably a reasonable choice here unless you are
confident the status will never change after the device is first
discovered? ATS is being set early in the boot sequence.

It is pretty safe to be over eager with the ATS enablement, less safe
to get it off when it needs to be on.

Jason



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