[RESEND v1] clk: imx95-blk-ctl: Fix REFCLK rise-fall mismatch on i.MX95

Abel Vesa abel.vesa at oss.qualcomm.com
Thu Jul 30 08:11:35 PDT 2026


On Thu, 30 Jul 2026 17:04:47 +0800, hongxing.zhu at oss.nxp.com wrote:
> When the internal PLL is used as the PCIe reference clock source on i.MX95,
> a REFCLK rise-fall time mismatch is observed during PCIe Gen1 compliance
> testing with the Lfast IO analyzer.
> 
> Fix this issue by configuring the IREF_TX field to 0xF (15), which adjusts
> the transmitter current reference to meet the PCIe specification timing
> requirements.
> 
> [...]

Applied, thanks!

[1/1] clk: imx95-blk-ctl: Fix REFCLK rise-fall mismatch on i.MX95
      commit: 39ec460b56b26319d1f31b459e8be7ea34ae9c67

Best regards,
-- 
Abel Vesa <abel.vesa at oss.qualcomm.com>



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