[PATCH] spi: xilinx: use device property accessors.

[Abdurrahman Hussain]

> On Jan 15, 2026, at 11:51 PM, Michal Simek <michal.simek at amd.com> wrote:
> 
> 
> 
> On 1/15/26 01:33, Abdurrahman Hussain wrote:
>> This makes the driver work on non-OF platforms.
>> Also, make irq optional, since the driver can already work in
>> polling mode.
>> Signed-off-by: Abdurrahman Hussain <abdurrahman at nexthop.ai>
>> ---
>>  drivers/spi/spi-xilinx.c | 12 ++++++------
>>  1 file changed, 6 insertions(+), 6 deletions(-)
>> diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
>> index c86dc56f38b4..9fb1da2fcce4 100644
>> --- a/drivers/spi/spi-xilinx.c
>> +++ b/drivers/spi/spi-xilinx.c
>> @@ -405,11 +405,11 @@ static int xilinx_spi_probe(struct platform_device *pdev)
>>   bits_per_word = pdata->bits_per_word;
>>   force_irq = pdata->force_irq;
>>   } else {
>> - of_property_read_u32(pdev->dev.of_node, "xlnx,num-ss-bits",
>> -   &num_cs);
>> - ret = of_property_read_u32(pdev->dev.of_node,
>> -    "xlnx,num-transfer-bits",
>> -    &bits_per_word);
>> + device_property_read_u32(&pdev->dev, "xlnx,num-ss-bits",
>> +  &num_cs);
>> + ret = device_property_read_u32(&pdev->dev,
>> +        "xlnx,num-transfer-bits",
>> +        &bits_per_word);
>>   if (ret)
>>   bits_per_word = 8;
>>   }
>> @@ -471,7 +471,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
>>   xspi->bytes_per_word = bits_per_word / 8;
>>   xspi->buffer_size = xilinx_spi_find_buffer_size(xspi);
>>  - xspi->irq = platform_get_irq(pdev, 0);
>> + xspi->irq = platform_get_irq_optional(pdev, 0);
>>   if (xspi->irq < 0 && xspi->irq != -ENXIO) {
>>   return xspi->irq;
>>   } else if (xspi->irq >= 0) {
> 
> 
> I expect this is another IP which you are using on systems with ACPI.
> Can you share ASL fragment you use for testing?
> 
> Thanks,
> Michal


Yes, that’s correct. We are using AMD Ryzen Embedded V3C48 based system with AMD (Xilinx) Artix 7 based FPGA using I2C and SPI IP blocks. The SPI block currently doesn’t have the interrupts working correctly (yet), so we disabled the interrupts. This is what the ASL fragment describing the SPI device looks like:

            Device (SPI0) {
                Name (_HID, "PRP0001")
                Name (_CRS, ResourceTemplate () {
                    Memory32Fixed (ReadWrite, 0x80950000, 0x00000200)
                })
                Name (_DSD, Package () {
                    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
                    Package () {
                        Package () { "compatible", "xlnx,axi-quad-spi-1.00.a" },
                        Package () { "xlnx,num-ss-bits", 5 },
                        Package () { "xlnx,num-transfer-bits", 8 },
                    }
                })

                Device (NOR0) {
                    Name (_HID, "PRP0001")
                    Name (_STR, Unicode ("TH5 Boot Flash"))
                    Name (_CRS, ResourceTemplate () {
                        SPISerialBus(0, PolarityLow, FourWireMode, 8, ControllerInitiated,
                            120000000, ClockPolarityHigh, ClockPhaseSecond,
                            "\\_SB.PCI0.GPP6.FPGA.SPI0")
                    })
                    Name (_DSD, Package () {
                        ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
                        Package () {
                            Package () { "compatible", "jedec,spi-nor" }
                        }
                    })
                }
            }

Thanks,
Abdurrahman