[PATCH 14/21] KVM: arm64: Apply dynamic guest counter reservations
Colton Lewis
coltonlewis at google.com
Mon Aug 17 15:24:48 PDT 2026
Hi Zide, thanks for the review.
"Chen, Zide" <zide.chen at intel.com> writes:
> On 6/12/2026 2:29 PM, Colton Lewis wrote:
>> Apply dynamic guest counter reservations by checking if the requested
>> guest mask collides with any events the host has scheduled and calling
>> pmu_perf_resched_update() with a hook that updates the mask of
>> available counters in between schedule out and schedule in.
>> Signed-off-by: Colton Lewis <coltonlewis at google.com>
>> ---
>> arch/arm64/kvm/pmu-direct.c | 69 +++++++++++++++++++++++++++++++++++-
>> include/linux/perf/arm_pmu.h | 1 +
>> 2 files changed, 69 insertions(+), 1 deletion(-)
>> diff --git a/arch/arm64/kvm/pmu-direct.c b/arch/arm64/kvm/pmu-direct.c
>> index 49f1feb5d280c..044f011c9c84b 100644
>> --- a/arch/arm64/kvm/pmu-direct.c
>> +++ b/arch/arm64/kvm/pmu-direct.c
>> @@ -87,6 +87,73 @@ u64 kvm_pmu_direct_pmcr_read(struct kvm_vcpu *vcpu)
>> ARMV8_PMU_PMCR_N);
>> }
>> +/* Callback to update counter mask between perf scheduling */
>> +static void kvm_pmu_update_mask(struct pmu *pmu, void *data)
>> +{
>> + struct arm_pmu *arm_pmu = to_arm_pmu(pmu);
>> + unsigned long *new_mask = data;
>> +
>> + bitmap_copy(arm_pmu->cntr_mask, new_mask, ARMPMU_MAX_HWEVENTS);
>> +}
>> +
>> +/**
>> + * kvm_pmu_set_guest_counters() - Handle dynamic counter reservations
>> + * @cpu_pmu: struct arm_pmu to potentially modify
>> + * @guest_mask: new guest mask for the pmu
>> + *
>> + * Check if guest counters will interfere with current host events and
>> + * call into perf_pmu_resched_update if a reschedule is required.
>> + */
>> +static void kvm_pmu_set_guest_counters(struct arm_pmu *cpu_pmu, u64
>> guest_mask)
>> +{
>> + struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events);
>> + DECLARE_BITMAP(guest_bitmap, ARMPMU_MAX_HWEVENTS);
>> + DECLARE_BITMAP(new_mask, ARMPMU_MAX_HWEVENTS);
>> + bool need_resched = false;
>> +
>> + bitmap_from_arr64(guest_bitmap, &guest_mask, ARMPMU_MAX_HWEVENTS);
>> + bitmap_copy(new_mask, cpu_pmu->hw_cntr_impl, ARMPMU_MAX_HWEVENTS);
>> +
>> + if (guest_mask) {
>> + /* Subtract guest counters from available host mask */
>> + bitmap_andnot(new_mask, new_mask, guest_bitmap, ARMPMU_MAX_HWEVENTS);
>> +
>> + /* Did we collide with an active host event? */
>> + if (bitmap_intersects(cpuc->used_mask, guest_bitmap,
>> ARMPMU_MAX_HWEVENTS)) {
>> + int idx;
>> +
>> + need_resched = true;
>> + cpuc->host_squeezed = true;
>> +
>> + /* Look for pinned events that are about to be preempted */
>> + for_each_set_bit(idx, guest_bitmap, ARMPMU_MAX_HWEVENTS) {
>> + if (test_bit(idx, cpuc->used_mask) && cpuc->events[idx] &&
>> + cpuc->events[idx]->attr.pinned) {
>> + pr_warn_once("perf: Pinned host event squeezed out by KVM guest
>> PMU partition\n");
>> + break;
>> + }
>> + }
>> + }
>> + } else {
>> + /*
>> + * Restoring to hw_cntr_impl.
>> + * Only resched if we previously squeezed an event.
>> + */
>> + if (cpuc->host_squeezed) {
>> + need_resched = true;
>> + cpuc->host_squeezed = false;
>> + }
>> + }
>> +
>> + if (need_resched) {
>> + /* Collision: run full perf reschedule */
>> + perf_pmu_resched_update(&cpu_pmu->pmu, kvm_pmu_update_mask, new_mask);
>> + } else {
>> + /* Host was never using guest counters anyway */
>> + bitmap_copy(cpu_pmu->cntr_mask, new_mask, ARMPMU_MAX_HWEVENTS);
>> + }
>> +}
>> +
>> /**
>> * kvm_pmu_host_counter_mask() - Compute bitmask of host-reserved
>> counters
>> * @pmu: Pointer to arm_pmu struct
>> @@ -209,6 +276,7 @@ void kvm_pmu_load(struct kvm_vcpu *vcpu)
>> pmu = vcpu->kvm->arch.arm_pmu;
>> guest_counters = kvm_pmu_guest_counter_mask(pmu);
>> + kvm_pmu_set_guest_counters(pmu, guest_counters);
>> kvm_pmu_apply_event_filter(vcpu);
>> for_each_set_bit(i, &guest_counters, ARMPMU_MAX_HWEVENTS) {
>> @@ -317,7 +385,6 @@ void kvm_pmu_put(struct kvm_vcpu *vcpu)
>> /* Stop guest counters and disable interrupts in hardware. */
>> write_sysreg(mask, pmcntenclr_el0);
>> write_sysreg(mask, pmintenclr_el1);
>> -
>> kvm_pmu_set_guest_counters(pmu, 0);
> I must have missed something.
> Here, vcpu->kvm->arch.arm_pmu->cntr_mask is restored to cntr_mask_impl.
> Is this same struct shared with the perf driver
> (to_arm_pmu(event->pmu)), and shared across other vCPUs as well?
> If so, if another pCPU still has a PMU-partition-enabled vcpu loaded
> with guest-owned counters (MDCR_EL2.HPMN is set), could a host event be
> scheduled onto one of those guest-owned counters, conflicting with the
> guest?
You're correct that is shared more widely than appropriate and could
cause such a conflict.
cntr_mask should be moved to the per-CPU struct pmu_hw_events inside
struct arm_pmu.
>> preempt_enable();
>> }
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