[PATCH 1/2] coresight: perf: Prefer large AUX mappings

[Leo Yan]

From: Dev Jain <dev.jain at arm.com>

Commit 18049c8cff9c ("perf/aux: Allocate non-contiguous AUX pages by
default") changed AUX allocation to use order-0 pages by default unless
a PMU explicitly asks for contiguous allocations. That reduces
unnecessary memory fragmentation for PMUs which do not require larger
AUX chunks.

TRBE relies on page-table translation for writing the AUX buffer. If a
large AUX buffer is built from order-0 pages, vmap() has to map it with
many small mappings. This adds TLB pressure from the trace unit itself,
and can increase trace-buffer latency and contribute to trace
discontinuities.

Set PERF_PMU_CAP_AUX_PREFER_LARGE for the CoreSight PMU. This asks the
generic AUX allocator to try larger-order allocations so that, with
the vmap() large-mapping support, contiguous chunks can be mapped with
larger granules.

Apply the same preference to traditional sinks such as ETR. ETR uses
double buffering (a bounce buffer and an AUX buffer) and does not use
CPU page table when accessing the bounce buffer, so this does not
benefit TTW latency there. It can still help when the driver or perf
tool accesses the AUX buffer.

With the mm large-mapping series already applied, a sparse branch test
using a 1GB AUX buffer with TRBE showed the following results over 10
iterations:

  l1d_tlb_refill: 163.7 -> 148.2  (-9.47%)
  l2d_tlb_refill: 161,884.9 -> 513.1  (-99.68%)
  dtlb_walk: 72.8 -> 63.9  (-12.23%)

This shows the intended reduction in TLB refill pressure and TLB walks
once the AUX buffer can use larger mappings.

Signed-off-by: Dev Jain <dev.jain at arm.com>
Signed-off-by: Leo Yan <leo.yan at arm.com>
---
 drivers/hwtracing/coresight/coresight-etm-perf.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 09b21a711a8764ea429d712890265c84648e889e..9646a1aab65b5b0b75c622bd18667ba0b916674f 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -1036,7 +1036,8 @@ int __init etm_perf_init(void)
 
 	etm_pmu.capabilities		= (PERF_PMU_CAP_EXCLUSIVE |
 					   PERF_PMU_CAP_ITRACE |
-					   PERF_PMU_CAP_AUX_PAUSE);
+					   PERF_PMU_CAP_AUX_PAUSE |
+					   PERF_PMU_CAP_AUX_PREFER_LARGE);
 
 	etm_pmu.attr_groups		= etm_pmu_attr_groups;
 	etm_pmu.task_ctx_nr		= perf_sw_context;

-- 
2.34.1