[PATCH] iommu/arm-smmu-v3: Allow disabling Stage 1 translation

[Jason Gunthorpe]

On Mon, Apr 20, 2026 at 12:32:01PM +0000, Evangelos Petrongonas wrote:
> When the hardware advertises both Stage 1 and Stage 2 translation, the
> driver prefers Stage 1 for DMA domain allocation and only falls back to
> Stage 2 if Stage 1 is not supported.
> 
> Some configurations may want to force Stage 2 translation even when the
> hardware supports Stage 1. 

Why? You really need to explain why for a patch like this.

If there really is some HW issue I think it is more appropriate to get
an IORT flag or IDR detection that the HW has a problem.

Jason