[PATCH 2/2] arm64: dts: imx8mm-phygate-tauri-l: Update pad ctl for USB OC pin

[Teresa Remmet]

Disable Hysteresis Enable Field in pad ctl register for USB OC pin
as this is more appropriate for the signal form in our case.

Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
---
 arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
index 755cf9cacd22..2ecc8b3c67da 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
@@ -452,7 +452,7 @@ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x00
 
 	pinctrl_usbotg1: usbotg1grp {
 		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x80
+			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x00
 		>;
 	};
 

-- 
2.25.1