[PATCH v3 09/31] coresight: etm4x: Add flag to control single-shot restart

[Mike Leach]

On Mon, 15 Sept 2025 at 11:33, Leo Yan <leo.yan at arm.com> wrote:
>
> Add a new argument restart_ss to etm4_enable_hw(). When passed as true,
> it resets the TRCSSCSRn.STATUS bit to 0 to re-enable single-shot
> control.
>
> No functional change. This is a preparation for a subsequent change.
>
> Signed-off-by: Leo Yan <leo.yan at arm.com>
> ---
>  drivers/hwtracing/coresight/coresight-etm4x-core.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index fbcd0fcd1992cd600d2eb8c95ae9a5adf0c287da..f61c9924ad0496be2e41c84172c2bbe348df7b60 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -487,7 +487,7 @@ static int etm4_enable_trace_unit(struct etmv4_drvdata *drvdata)
>         return 0;
>  }
>
> -static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
> +static int etm4_enable_hw(struct etmv4_drvdata *drvdata, bool restart_ss)
>  {
>         int i, rc;
>         struct etmv4_config *config = &drvdata->config;
> @@ -562,9 +562,11 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
>                 etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i));
>
>         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
> -               /* always clear status bit on restart if using single-shot */
> -               if (config->ss_ctrl[i] || config->ss_pe_cmp[i])
> -                       config->ss_status[i] &= ~TRCSSCSRn_STATUS;
> +               if (restart_ss) {
> +                       /* always clear status bit on restart if using single-shot */
> +                       if (config->ss_ctrl[i] || config->ss_pe_cmp[i])
> +                               config->ss_status[i] &= ~TRCSSCSRn_STATUS;
> +               }
>                 etm4x_relaxed_write32(csa, config->ss_ctrl[i], TRCSSCCRn(i));
>                 etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i));
>                 if (etm4x_sspcicrn_present(drvdata, i))
> @@ -628,7 +630,7 @@ static void etm4_enable_hw_smp_call(void *info)
>                 return;
>         }
>
> -       arg->rc = etm4_enable_hw(arg->drvdata);
> +       arg->rc = etm4_enable_hw(arg->drvdata, true);
>
>         /* The tracer didn't start */
>         if (arg->rc)
> @@ -867,7 +869,7 @@ static int etm4_enable_perf(struct coresight_device *csdev,
>         drvdata->paused = !!READ_ONCE(event->hw.aux_paused);
>
>         /* And enable it */
> -       ret = etm4_enable_hw(drvdata);
> +       ret = etm4_enable_hw(drvdata, true);
>
>  out:
>         /* The tracer didn't start */
> @@ -1833,7 +1835,7 @@ static int etm4_starting_cpu(unsigned int cpu)
>                 etm4_os_unlock(etmdrvdata[cpu]);
>
>         if (coresight_get_mode(etmdrvdata[cpu]->csdev))
> -               etm4_enable_hw(etmdrvdata[cpu]);
> +               etm4_enable_hw(etmdrvdata[cpu], true);
>         raw_spin_unlock(&etmdrvdata[cpu]->spinlock);
>         return 0;
>  }
>
> --
> 2.34.1
>

Reviewed-by: Mike Leach <mike.leach at linaro.org>
-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK