[PATCH 3/3] dts: reset: add support for cix sky1 resets
Gary Yang
gary.yang at cixtech.com
Thu Nov 6 19:38:19 PST 2025
There are two reset conctrollers on Cix Sky1 Soc.
One is located in S0 domain, and the other is located
in S5 domain.
Signed-off-by: Gary Yang <gary.yang at cixtech.com>
---
arch/arm64/boot/dts/cix/sky1.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index d21387224e79..fc68734f37c2 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -348,6 +348,13 @@ i3c1: i3c at 4100000 {
status = "disabled";
};
+ src_fch: reset-controller at 4160000 {
+ compatible = "cix,sky1-rst-fch", "syscon";
+ reg = <0x0 0x04160000 0x0 0x90>;
+ #reset-cells = <1>;
+ status = "okay";
+ };
+
iomuxc: pinctrl at 4170000 {
compatible = "cix,sky1-iomuxc";
reg = <0x0 0x04170000 0x0 0x1000>;
@@ -568,6 +575,13 @@ ppi_partition1: interrupt-partition-1 {
};
};
+ src: reset-controller at 16000000 {
+ compatible = "cix,sky1-rst", "syscon";
+ reg = <0x0 0x16000000 0x0 0x1000>;
+ #reset-cells = <1>;
+ status = "okay";
+ };
+
iomuxc_s5: pinctrl at 16007000 {
compatible = "cix,sky1-iomuxc-s5";
reg = <0x0 0x16007000 0x0 0x1000>;
--
2.49.0
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