[PATCH v2 2/2] arm64: dts: rockchip: Add gmac phy reset GPIO
Andrew Lunn
andrew at lunn.ch
Thu Mar 20 05:52:24 PDT 2025
On Tue, Mar 18, 2025 at 10:08:46PM +0100, Uwe Kleine-König wrote:
> While looking through the vendor U-Boot code Heiko spotted that a SoC
> GPIO is connected to the ethernet phy's reset pin. Add the respective
> reset-gpios property with pinmuxing for the GPIO to the phy node.
>
> Signed-off-by: Uwe Kleine-König <uwe at kleine-koenig.org>
> ---
> arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> index 70e88769e21c..411f8ac7994b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
> @@ -485,6 +485,10 @@ rgmii_phy0: ethernet-phy at 3 {
> /* Motorcomm YT8521 phy */
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <0x3>;
> + pinctrl-0 = <ð_phy0_reset_pin>;
> + pinctrl-names = "default";
> + reset-assert-us = <10000>;
> + reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
Sometimes a reset-deassert-us property is needed, in order to give the
PHY time to get ready. But i assume you have tested this with lots of
reboot.
Reviewed-by: Andrew Lunn <andrew at lunn.ch>
Andrew
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