回覆: [PATCH v2 01/10] dt-bindings: soc: aspeed: Add ASPEED PCIe Config support

[Jacky Chou]

Hi Krzysztof,

Thank you for your reply.

> > +maintainers:
> > +  - Jacky Chou <jacky_chou at aspeedtech.com>
> > +
> > +description: |
> 
> Drop |
> 

Agreed.

> > +  The ASPEED PCIe configuration syscon block provides a set of
> > + registers shared  by multiple PCIe-related devices within the SoC.
> > + This node represents the  common configuration space that allows
> > + these devices to coordinate and manage  shared PCIe settings,
> > + including address mapping, control, and status  registers. The
> > + syscon interface enables for various PCIe devices to access  and modify
> these shared registers in a consistent and centralized manner.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - aspeed,pcie-cfg
> 
> NAK, see writing bindings. You already received comments about generic
> compatible in the past.
> 

I understand the generic aspeed,pcie-cfg is not acceptable per the binding guidelines.
I will update it in the next version to use a more specific name like aspeed,ast2600-pciecfg.
Thanks again for your guidance.

Thanks,
Jacky