EDAC on imx8mp and ddr scaling

[Michael Nazzareno Trimarchi]

Hi Sherry and Shawn

I have seen that with this patch "arm64: dts: imx8mp: add ddr
controller node to support EDAC on imx8mp" but on the same time
the ddr scaling is coming from arm_smccc_smc DVFS frequency scaling
that is managed from imx8m-ddrc. We have tested it a bit
to understand if the circle to have the code call from linux to ATF
was somehow working. We don't check other than small things.
If the imx8mp is compatible with imx8m-ddrc and synopsys memory
controller, should not needed to merge the support in the
synopsys connected to the board platform data?

Best regards
Michael