[PATCH net-next v2 1/3] net: phy: mediatek: Add 2.5Gphy firmware dt-bindings and dts node

[SkyLake Huang (黃啟澤)]

On Wed, 2025-02-19 at 15:30 +0000, Daniel Golle wrote:
> 
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> 
> On Wed, Feb 19, 2025 at 04:26:21PM +0100, Andrew Lunn wrote:
> > > +description: |
> > > +  MediaTek Built-in 2.5G Ethernet PHY needs to load firmware so
> > > it can
> > > +  run correctly.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: "mediatek,2p5gphy-fw"
> > > +
> > > +  reg:
> > > +    items:
> > > +      - description: pmb firmware load address
> > > +      - description: firmware trigger register
> > > +
> > > +required:
> > > +  - compatible
> > > +  - reg
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > +  - |
> > > +    phyfw: phy-firmware at f000000 {
> > > +      compatible = "mediatek,2p5gphy-fw";
> > > +      reg = <0 0x0f100000 0 0x20000>,
> > > +            <0 0x0f0f0018 0 0x20>;
> > > +    };
> > 
> > This is not a device in itself is it? There is no driver for this.
> > 
> > It seems like these should be properties in the PHY node, since it
> > is
> > the PHY driver which make use of them. This cannot be the first SoC
> > device which is both on some sort of serial bus, but also has
> > memory
> > mapped registers.
> 
> I'm afraid it is...
> 
It's actually MCU's memory mapped registers. This MCU will control all
of this built-in the 2.5Gphy's behaviors and it provides faster bus
access speed than MDC/MDIO.

> > Please look around and find the correct way to do this.
> 
> Would using a 'reserved-memory' region be an option maybe?
Or maybe just leave those mapped registers' addresses in driver code
(mtk-2p5ge.c)? Like:
#define MT7988_2P5GE_PMB_BASE (0x0f100000)
#define MT7988_2P5GE_PMB_LEN  (0x20000)

I'm not sure which is more Linux upstream style.

BRs,
Sky