[PATCH 2/2] arm64: dts: freescale: add initial device tree for TQMa8XxS

Alexander Stein alexander.stein at ew.tq-group.com
Wed Apr 16 04:53:52 PDT 2025


Hi Andrew,

Am Dienstag, 15. April 2025, 17:27:37 CEST schrieb Andrew Lunn:
> > +&fec1 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_fec1>;
> > +	phy-mode = "rgmii-id";
> > +	phy-handle = <&ethphy0>;
> > +	fsl,magic-packet;
> > +	mac-address = [ 00 00 00 00 00 00 ];
> > +
> > +	mdio {
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		ethphy0: ethernet-phy at 0 {
> > +			compatible = "ethernet-phy-ieee802.3-c22";
> > +			reg = <0>;
> > +			pinctrl-names = "default";
> > +			pinctrl-0 = <&pinctrl_ethphy0>;
> > +			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
> > +			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
> > +			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> > +			ti,dp83867-rxctrl-strap-quirk;
> > +			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
> > +			reset-gpios = <&lsio_gpio3 22 GPIO_ACTIVE_LOW>;
> > +			reset-assert-us = <500000>;
> > +			reset-deassert-us = <50000>;
> > +			enet-phy-lane-no-swap;
> > +			interrupt-parent = <&lsio_gpio1>;
> > +			interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
> 
> EDGE_FALLING is very likely to be wrong. PHYs are generally level
> triggered, not edge.

Thanks for that comment. I checked with my colleagues and it is
indeed level-low. Will fix in v2.

Thanks
Alexander
-- 
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Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/





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