[PATCH v2 1/6] arm64: Provide basic EL2 setup for FEAT_{LS64, LS64_V} usage at EL0/1
Yicong Yang
yangyicong at huawei.com
Sun Apr 6 20:50:45 PDT 2025
On 2025/4/3 17:04, Suzuki K Poulose wrote:
> On 31/03/2025 10:43, Yicong Yang wrote:
>> From: Yicong Yang <yangyicong at hisilicon.com>
>>
>> Instructions introduced by FEAT_{LS64, LS64_V} is controlled by
>> HCRX_EL2.{EnALS, EnASR}. Configure all of these to allow usage
>> at EL0/1.
>>
>> This doesn't mean these instructions are always available in
>> EL0/1 if provided. The hypervisor still have the control at
>> runtime.
>>
>> Signed-off-by: Yicong Yang <yangyicong at hisilicon.com>
>> ---
>> arch/arm64/include/asm/el2_setup.h | 12 +++++++++++-
>> 1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
>> index ebceaae3c749..0259941602c4 100644
>> --- a/arch/arm64/include/asm/el2_setup.h
>> +++ b/arch/arm64/include/asm/el2_setup.h
>> @@ -57,9 +57,19 @@
>> /* Enable GCS if supported */
>> mrs_s x1, SYS_ID_AA64PFR1_EL1
>> ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4
>> - cbz x1, .Lset_hcrx_\@
>> + cbz x1, .Lskip_gcs_hcrx_\@
>> orr x0, x0, #HCRX_EL2_GCSEn
>> +.Lskip_gcs_hcrx_\@:
>
> minor nit: For consistency, could we rename this "set_ls64", similar to "set_hcrx" ?
>
IIUC, set_xxx really touches the registers and skip_xxx should just check and prepare
the feature bits. so here using .Lskip_gcs_hrcx_\@ should be more proper and consistent
with other places in el2_setup.h, like __init_el2_debug/__init_el2_fgt which also use
.Lskip_xxx for skipping an unsupported feature?
Thanks.
>> + /* Enable LS64, LS64_V if supported */
>> + mrs_s x1, SYS_ID_AA64ISAR1_EL1
>> + ubfx x1, x1, #ID_AA64ISAR1_EL1_LS64_SHIFT, #4
>> + cbz x1, .Lset_hcrx_\@
>> + orr x0, x0, #HCRX_EL2_EnALS
>> + cmp x1, #ID_AA64ISAR1_EL1_LS64_LS64_V
>> + b.lt .Lset_hcrx_\@
>> + orr x0, x0, #HCRX_EL2_EnASR
>> +
>> .Lset_hcrx_\@:
>> msr_s SYS_HCRX_EL2, x0
>> .Lskip_hcrx_\@:
>
> Suzuki
>
> .
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