[PATCH v2 2/2] arm64: dts: s32g2: Disable support for SD/eMMC UHS mode

Matthias Brugger mbrugger at suse.com
Fri Sep 6 08:53:52 PDT 2024



On 30/08/2024 13:33, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea at oss.nxp.com>
> 
> Disable SD/eMMC UHS modes for NXP boards which do not set VCCQ voltage
> supply to 1.8V by default, such as S32G274A-EVB and S32G274A-RDB2.
> 
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea at oss.nxp.com>

Reviewed-by: Matthias Brugger <mbrugger at suse.com>

> ---
>   arch/arm64/boot/dts/freescale/s32g274a-evb.dts  | 1 +
>   arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 9 +++++++++
>   2 files changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
> index 7ab917f547ef..b9a119eea2b7 100644
> --- a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
> +++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
> @@ -39,5 +39,6 @@ &usdhc0 {
>   	pinctrl-1 = <&pinctrl_usdhc0_100mhz>;
>   	pinctrl-2 = <&pinctrl_usdhc0_200mhz>;
>   	disable-wp;
> +	no-1-8-v;
>   	status = "okay";
>   };
> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
> index 8739f63771bc..aaa61a8ad0da 100644
> --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
> +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
> @@ -45,5 +45,14 @@ &usdhc0 {
>   	pinctrl-1 = <&pinctrl_usdhc0_100mhz>;
>   	pinctrl-2 = <&pinctrl_usdhc0_200mhz>;
>   	disable-wp;
> +	/* Remove no-1-8-v to enable higher speed modes for SD card.
> +	 * However, this is not enough to enable HS400 or HS200 modes for eMMC.
> +	 * In this case, the position of the resistor R797 must be changed
> +	 * from A to B before removing the property.
> +	 * If the property is removed without changing the resistor position,
> +	 * HS*00 may be enabled, but the interface might be unstable because of
> +	 * the wrong VCCQ voltage applied to the eMMC.
> +	 */
> +	no-1-8-v;
>   	status = "okay";
>   };



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