[PATCH v10 09/11] arm64: dts: imx93-11x11-evk: enable usb and typec nodes
Shawn Guo
shawnguo2 at yeah.net
Tue Apr 2 02:07:01 PDT 2024
On Thu, Mar 21, 2024 at 04:14:37PM +0800, Xu Yang wrote:
> There are 2 Type-C ports and 2 USB controllers on i.MX93. Enable them.
>
> Signed-off-by: Xu Yang <xu.yang_2 at nxp.com>
>
> ---
> Changes in v2:
> - remove status property in ptn5110 nodes
> - fix dt-schema warnings
> Changes in v3:
> - no changes
> Changes in v4:
> - no changes
> Changes in v5:
> - no changes
> Changes in v6:
> - no changes
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - use compatible "nxp,ptn5110", "tcpci"
> Changes in v10:
> - no changes
> ---
> .../boot/dts/freescale/imx93-11x11-evk.dts | 118 ++++++++++++++++++
> 1 file changed, 118 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> index 9921ea13ab48..ecc01d872e95 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> @@ -5,6 +5,7 @@
>
> /dts-v1/;
>
> +#include <dt-bindings/usb/pd.h>
> #include "imx93.dtsi"
>
> / {
> @@ -104,6 +105,80 @@ &mu2 {
> status = "okay";
> };
>
> +&lpi2c3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_lpi2c3>;
> + pinctrl-1 = <&pinctrl_lpi2c3>;
Do you really need "sleep" pinctrl state?
> + status = "okay";
> +
> + ptn5110: tcpc at 50 {
> + compatible = "nxp,ptn5110", "tcpci";
> + reg = <0x50>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> +
> + typec1_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + op-sink-microwatt = <15000000>;
> + self-powered;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
Have a newline between properties and child node.
Shawn
> + typec1_dr_sw: endpoint {
> + remote-endpoint = <&usb1_drd_sw>;
> + };
> + };
> + };
> + };
> + };
> +
> + ptn5110_2: tcpc at 51 {
> + compatible = "nxp,ptn5110", "tcpci";
> + reg = <0x51>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> +
> + typec2_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + op-sink-microwatt = <15000000>;
> + self-powered;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + typec2_dr_sw: endpoint {
> + remote-endpoint = <&usb2_drd_sw>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> &eqos {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_eqos>;
> @@ -156,6 +231,42 @@ &lpuart5 {
> status = "okay";
> };
>
> +&usbotg1 {
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + usb-role-switch;
> + disable-over-current;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + status = "okay";
> +
> + port {
> + usb1_drd_sw: endpoint {
> + remote-endpoint = <&typec1_dr_sw>;
> + };
> + };
> +};
> +
> +&usbotg2 {
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + usb-role-switch;
> + disable-over-current;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + status = "okay";
> +
> + port {
> + usb2_drd_sw: endpoint {
> + remote-endpoint = <&typec2_dr_sw>;
> + };
> + };
> +};
> +
> &usdhc1 {
> pinctrl-names = "default", "state_100mhz", "state_200mhz";
> pinctrl-0 = <&pinctrl_usdhc1>;
> @@ -222,6 +333,13 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
> >;
> };
>
> + pinctrl_lpi2c3: lpi2c3grp {
> + fsl,pins = <
> + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
> + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
> + >;
> + };
> +
> pinctrl_uart1: uart1grp {
> fsl,pins = <
> MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> --
> 2.34.1
>
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