[PATCH 2/5] iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping

[Shameerali Kolothum Thodi]

> -----Original Message-----
> From: Jason Gunthorpe <jgg at nvidia.com>
> Sent: Wednesday, November 29, 2023 7:31 PM
> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi at huawei.com>
> Cc: iommu at lists.linux.dev; linux-arm-kernel at lists.infradead.org;
> robin.murphy at arm.com; will at kernel.org; joro at 8bytes.org;
> kevin.tian at intel.com; nicolinc at nvidia.com; mshavit at google.com;
> eric.auger at redhat.com; joao.m.martins at oracle.com; jiangkunkun
> <jiangkunkun at huawei.com>; zhukeqian <zhukeqian1 at huawei.com>; Linuxarm
> <linuxarm at huawei.com>
> Subject: Re: [PATCH 2/5] iommu/arm-smmu-v3: Enable HTTU for stage1 with io-
> pgtable mapping
> 
> On Tue, Nov 28, 2023 at 09:49:37AM +0000, Shameer Kolothum wrote:
> 
> >  /* IOMMU API */
> >  static bool arm_smmu_capable(struct device *dev, enum iommu_cap cap)
> >  {
> > @@ -2401,6 +2413,10 @@ static int arm_smmu_domain_finalise(struct
> arm_smmu_domain *smmu_domain,
> >  		.iommu_dev	= smmu->dev,
> >  	};
> >
> > +	if (arm_smmu_dbm_capable(smmu) &&
> > +	    smmu_domain->stage == ARM_SMMU_DOMAIN_S1)
> > +		pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_ARM_HD;
> > +
> 
> This flow has become a bit wonky, the switch statement right above is
> already checking S1 and partially initializing pgtbl_cfg.
> 
> I suggest moving the pgtbl_cfg init to above the switch and making the
> switch store directly into pgtbl_cfg values and remove the stack ios
> and oas values
> 

Got it. Will do.

Thanks,
Shameer