[PATCH 1/6] arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node
Neil Armstrong
neil.armstrong at linaro.org
Wed May 3 06:10:33 PDT 2023
Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI
to avoid duplication in the devices DTs.
Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index ebcb481571c2..d048f4d35c89 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2149,6 +2149,32 @@ usb_1_qmpphy: phy at 88e9000 {
#phy-cells = <1>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+
+ usb_1_qmpphy_out: endpoint {
+ };
+ };
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ usb_1_qmpphy_usb_ss_in: endpoint at 0 {
+ reg = <0>;
+ };
+
+ usb_1_qmpphy_dp_in: endpoint at 1 {
+ reg = <1>;
+ };
+ };
+ };
};
usb_2_qmpphy: phy-wrapper at 88eb000 {
--
2.34.1
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