[PATCH v1 15/18] arm64: disable EL2 traps for PIE

[Catalin Marinas]

On Tue, Mar 28, 2023 at 11:34:27AM +0100, Joey Gouly wrote:
> On Mon, Mar 27, 2023 at 05:59:23PM +0100, Catalin Marinas wrote:
> > On Thu, Mar 09, 2023 at 02:52:43PM +0000, Joey Gouly wrote:
> > > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> > > index 037724b19c5c..6e6675fae194 100644
> > > --- a/arch/arm64/include/asm/el2_setup.h
> > > +++ b/arch/arm64/include/asm/el2_setup.h
> > > @@ -22,6 +22,21 @@
> > >  	isb
> > >  .endm
> > >  
> > > +.macro __init_el2_hcrx
> > > +	mrs	x1, id_aa64mmfr1_el1
> > > +	ubfx	x0, x1, #ID_AA64MMFR1_EL1_HCX_SHIFT, 4
> > > +	cbz	x0, .Lskip_hcrx_\@
> > > +
> > > +	mrs_s	x1, SYS_ID_AA64MMFR2_EL1
> > > +	ubfx	x0, x1, #ID_AA64MMFR3_EL1_TCRX_SHIFT, 4
> > > +	cbz	x0, .Lskip_hcrx_\@
> > > +
> > > +	mrs_s	x0, SYS_HCRX_EL2
> > > +	orr	x0, x0, #HCRX_EL2_TCR2En
> > > +	msr_s	SYS_HCRX_EL2, x0
> > > +.Lskip_hcrx_\@:
> > > +.endm
> > 
> > Can we not just set HCRX_EL2_TCR2En without probing for TCRX?
> 
> It's RES0, so I avoided it, but if it's fine I can drop the check.

We do this in a few other places (SCTLR_ELx etc). When it's RES0, we
only write 0 as we can't tell what it will do in a future architecture
version. But now that it has a defined meaning, just set it and it
has no effect on earlier CPUs (there is a definition of RES0 on page
11943 in the Arm ARM).

-- 
Catalin