[PATCH v1 15/18] arm64: disable EL2 traps for PIE

Joey Gouly joey.gouly at arm.com
Tue Mar 28 03:34:27 PDT 2023


Hi Catalin,

On Mon, Mar 27, 2023 at 05:59:23PM +0100, Catalin Marinas wrote:
> On Thu, Mar 09, 2023 at 02:52:43PM +0000, Joey Gouly wrote:
> > Disable trapping of TCR2_EL1 and PIRx_EL1 registers, so they can be
> > accessed from by EL1.
> > 
> > Signed-off-by: Joey Gouly <joey.gouly at arm.com>
> > Cc: Catalin Marinas <catalin.marinas at arm.com>
> > Cc: Will Deacon <will at kernel.org>
> > ---
> >  arch/arm64/include/asm/el2_setup.h | 27 ++++++++++++++++++++++++++-
> >  1 file changed, 26 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> > index 037724b19c5c..6e6675fae194 100644
> > --- a/arch/arm64/include/asm/el2_setup.h
> > +++ b/arch/arm64/include/asm/el2_setup.h
> > @@ -22,6 +22,21 @@
> >  	isb
> >  .endm
> >  
> > +.macro __init_el2_hcrx
> > +	mrs	x1, id_aa64mmfr1_el1
> > +	ubfx	x0, x1, #ID_AA64MMFR1_EL1_HCX_SHIFT, 4
> > +	cbz	x0, .Lskip_hcrx_\@
> > +
> > +	mrs_s	x1, SYS_ID_AA64MMFR2_EL1
> > +	ubfx	x0, x1, #ID_AA64MMFR3_EL1_TCRX_SHIFT, 4
> > +	cbz	x0, .Lskip_hcrx_\@
> > +
> > +	mrs_s	x0, SYS_HCRX_EL2
> > +	orr	x0, x0, #HCRX_EL2_TCR2En
> > +	msr_s	SYS_HCRX_EL2, x0
> > +.Lskip_hcrx_\@:
> > +.endm
> 
> Can we not just set HCRX_EL2_TCR2En without probing for TCRX?

It's RES0, so I avoided it, but if it's fine I can drop the check.

> 
> BTW, Kristina's doing some initialisation of HCRX_EL2 as well here, not
> sure whether they conflict:
> 
> https://lore.kernel.org/all/20230216160012.272345-2-kristina.martsenko@arm.com/

I don't think they will conflict in the git sense. I think it should be pretty
easy to deal with, this code can be dropped, and HCRX_{HOST, GUEST}_FLAGS will
need to be modified to include HCRX_EL2_TCR2En.

Thanks,
Joey



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