[PATCH 2/2] KVM: arm64: Move FGT value configuration to vCPU state
Mark Brown
broonie at kernel.org
Fri Mar 17 07:06:31 PDT 2023
On Fri, Mar 17, 2023 at 01:49:50PM +0000, Mark Brown wrote:
> On Fri, Mar 17, 2023 at 09:02:32AM +0000, Marc Zyngier wrote:
> > Mark Brown <broonie at kernel.org> wrote:
> > > + vcpu->arch.hfgrtr_el2 = 0;
> > > + vcpu->arch.hfgwtr_el2 = 0;
> > This needs documenting by enumerating the sysregs that get trapped.
> That's an awful lot of registers with the fine grained traps, and when
> extended to cover HFHxTR2 there's a bunch of RES0 bits intended for
> future traps. It feels a bit unmanagable. I'd have expected something
> more along the lines of "enable all traps other than...". The pattern
> seemed to be more to have an explicit initialiser for the bits that are
> set (eg, with CPACR_EL1) which was why I didn't put anything explicit.
Actually having checked it's a bit more than half of the bits are 0 for
no trap so enumerating those that are trapped is a bit shorter.
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