[PATCH v1 2/2] aarch64: enable Permission Indirection Extension

[Joey Gouly]

Allow lower ELs to access the registers associated with the Permission
Indirection Extension.

Signed-off-by: Joey Gouly <joey.gouly at arm.com>
---
 arch/aarch64/include/asm/cpu.h | 2 ++
 arch/aarch64/init.c            | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
index 3686e08..fe732dc 100644
--- a/arch/aarch64/include/asm/cpu.h
+++ b/arch/aarch64/include/asm/cpu.h
@@ -52,6 +52,7 @@
 #define SCR_EL3_HXEn			BIT(38)
 #define SCR_EL3_EnTP2			BIT(41)
 #define SCR_EL3_TCR2EN			BIT(43)
+#define SCR_EL3_PIEN			BIT(45)
 
 #define HCR_EL2_RES1			BIT(1)
 
@@ -75,6 +76,7 @@
 #define ID_AA64MMFR1_EL1_HCX		BITS(43, 40)
 
 #define ID_AA64MMFR3_EL1_TCRX		BITS(4, 0)
+#define ID_AA64MMFR3_EL1_S1PIE		BITS(11, 8)
 
 #define ID_AA64PFR1_EL1_MTE		BITS(11, 8)
 #define ID_AA64PFR1_EL1_SME		BITS(27, 24)
diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c
index f004e41..0fd7535 100644
--- a/arch/aarch64/init.c
+++ b/arch/aarch64/init.c
@@ -67,6 +67,9 @@ void cpu_init_el3(void)
 	if (mrs_field(ID_AA64MMFR3_EL1, TCRX))
 		scr |= SCR_EL3_TCR2EN;
 
+	if (mrs_field(ID_AA64MMFR3_EL1, S1PIE))
+		scr |= SCR_EL3_PIEN;
+
 	if (mrs_field(ID_AA64PFR1_EL1, MTE) >= 2)
 		scr |= SCR_EL3_ATA;
 
-- 
2.17.1