[PATCH v1 1/2] aarch64: enable access to TCR2_ELx

Joey Gouly joey.gouly at arm.com
Fri Mar 10 09:36:56 PST 2023


Allow access the TCR2_ELx register which provides extended translation
controls similar to TCR_ELx.

Signed-off-by: Joey Gouly <joey.gouly at arm.com>
---
 arch/aarch64/include/asm/cpu.h | 5 +++++
 arch/aarch64/init.c            | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
index 89a8f78..3686e08 100644
--- a/arch/aarch64/include/asm/cpu.h
+++ b/arch/aarch64/include/asm/cpu.h
@@ -51,6 +51,7 @@
 #define SCR_EL3_TME			BIT(34)
 #define SCR_EL3_HXEn			BIT(38)
 #define SCR_EL3_EnTP2			BIT(41)
+#define SCR_EL3_TCR2EN			BIT(43)
 
 #define HCR_EL2_RES1			BIT(1)
 
@@ -73,6 +74,8 @@
 
 #define ID_AA64MMFR1_EL1_HCX		BITS(43, 40)
 
+#define ID_AA64MMFR3_EL1_TCRX		BITS(4, 0)
+
 #define ID_AA64PFR1_EL1_MTE		BITS(11, 8)
 #define ID_AA64PFR1_EL1_SME		BITS(27, 24)
 #define ID_AA64PFR0_EL1_SVE		BITS(35, 32)
@@ -122,6 +125,8 @@
 
 #define ID_AA64ISAR2_EL1	s3_0_c0_c6_2
 
+#define ID_AA64MMFR3_EL1	s3_0_c0_c7_3
+
 #define SCTLR_EL1_CP15BEN	(1 << 5)
 
 #ifdef KERNEL_32
diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c
index 471e234..f004e41 100644
--- a/arch/aarch64/init.c
+++ b/arch/aarch64/init.c
@@ -64,6 +64,9 @@ void cpu_init_el3(void)
 	if (mrs_field(ID_AA64MMFR1_EL1, HCX))
 		scr |= SCR_EL3_HXEn;
 
+	if (mrs_field(ID_AA64MMFR3_EL1, TCRX))
+		scr |= SCR_EL3_TCR2EN;
+
 	if (mrs_field(ID_AA64PFR1_EL1, MTE) >= 2)
 		scr |= SCR_EL3_ATA;
 
-- 
2.17.1




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