[PATCH 2/3] perf/imx_ddr: adjust counter result after read cycle counter

[Xu Yang]

Hi Frank,

> -----Original Message-----
> From: Frank Li <frank.li at nxp.com>
> Sent: Wednesday, July 5, 2023 10:53 PM
> To: Xu Yang <xu.yang_2 at nxp.com>
> Cc: will at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org; s.hauer at pengutronix.de; kernel at pengutronix.de;
> dl-linux-imx <linux-imx at nxp.com>; linux-arm-kernel at lists.infradead.org
> Subject: RE: [PATCH 2/3] perf/imx_ddr: adjust counter result after read cycle counter
> 
> 
> 
> > -----Original Message-----
> > From: Xu Yang <xu.yang_2 at nxp.com>
> > Sent: Wednesday, July 5, 2023 5:48 AM
> > To: Frank Li <frank.li at nxp.com>
> > Cc: will at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org;
> > s.hauer at pengutronix.de; kernel at pengutronix.de; dl-linux-imx <linux-
> > imx at nxp.com>; linux-arm-kernel at lists.infradead.org; Xu Yang
> > <xu.yang_2 at nxp.com>
> > Subject: [PATCH 2/3] perf/imx_ddr: adjust counter result after read cycle
> > counter
> >
> > Because we initialize CP filed to shorten counter0 overflow time, the cycle
> > counter will start couting from a fixed/base value each time. We need to
> > remove the base from the result too. Therefore, we could get precise result
> > from cycle counter.
> >
> > Signed-off-by: Xu Yang <xu.yang_2 at nxp.com>
> > ---
> >  drivers/perf/fsl_imx8_ddr_perf.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/perf/fsl_imx8_ddr_perf.c
> > b/drivers/perf/fsl_imx8_ddr_perf.c
> > index cc7693f49950..4e6cbfc48429 100644
> > --- a/drivers/perf/fsl_imx8_ddr_perf.c
> > +++ b/drivers/perf/fsl_imx8_ddr_perf.c
> > @@ -482,6 +482,13 @@ static void ddr_perf_event_update(struct
> > perf_event *event)
> >  	int ret;
> >
> >  	new_raw_count = ddr_perf_read_counter(pmu, counter);
> > +	/* Workaround for i.MXMP */
> > +	if ((pmu->devtype_data->quirks &
> > DDR_CAP_AXI_ID_FILTER_ENHANCED) ==
> > +		DDR_CAP_AXI_ID_FILTER_ENHANCED) {
> 
> Supposed below check should be enough.

No, this workaround is only for imx8mp. We need this condition to filter
it. For other platforms, we'd better let cycle counter start counting
from 0.

Thanks,
Xu Yang

> 
> if (pmu->devtype_data->quirks &  DDR_CAP_AXI_ID_FILTER_ENHANCED)
> 
> > +		if (counter == EVENT_CYCLES_COUNTER)
> > +			new_raw_count -= 0xF0000000;
> > +	}
> > +
> >  	local64_add(new_raw_count, &event->count);
> >
> >  	/*
> > --
> > 2.34.1