[PATCH 3/3] perf/imx_ddr: don't enable counter0 if none of 4 counters are used

[Xu Yang]

In current driver, counter0 will be enabled after ddr_perf_pmu_enable()
is called even though none of the 4 counters are used. This will cause
counter0 continue to count until ddr_perf_pmu_disabled() is called. If
pmu is not disabled all the time, the pmu interrupt will be asserted
from time to time due to counter0 will overflow and irq handler will
clear it. It's not an expected behavior. This patch will not enable
counter0 if none of 4 counters are used.

Fixes: 9a66d36cc7ac ("drivers/perf: imx_ddr: Add DDR performance counter support to perf")
Signed-off-by: Xu Yang <xu.yang_2 at nxp.com>
---
 drivers/perf/fsl_imx8_ddr_perf.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c
index 4e6cbfc48429..f7c832611713 100644
--- a/drivers/perf/fsl_imx8_ddr_perf.c
+++ b/drivers/perf/fsl_imx8_ddr_perf.c
@@ -591,7 +591,9 @@ static void ddr_perf_pmu_enable(struct pmu *pmu)
 	struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
 
 	/* enable cycle counter if cycle is not active event list */
-	if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL)
+	if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL &&
+	   (ddr_pmu->events[0] || ddr_pmu->events[1] ||
+	    ddr_pmu->events[2] || ddr_pmu->events[3]))
 		ddr_perf_counter_enable(ddr_pmu,
 				      EVENT_CYCLES_ID,
 				      EVENT_CYCLES_COUNTER,
@@ -602,7 +604,9 @@ static void ddr_perf_pmu_disable(struct pmu *pmu)
 {
 	struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
 
-	if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL)
+	if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL &&
+	   (ddr_pmu->events[0] || ddr_pmu->events[1] ||
+	    ddr_pmu->events[2] || ddr_pmu->events[3]))
 		ddr_perf_counter_enable(ddr_pmu,
 				      EVENT_CYCLES_ID,
 				      EVENT_CYCLES_COUNTER,
-- 
2.34.1