[PATCH 0/2] Allwinner power domain support
Samuel Holland
samuel at sholland.org
Wed Jan 25 22:23:48 PST 2023
Hi Jernej,
On 1/5/23 10:34, Jernej Škrabec wrote:
> Dne sobota, 31. december 2022 ob 17:04:00 CET je Samuel Holland napisal(a):
>> This series adds support for the power controller found in D1 and other
>> recent Allwinner SoCs. There is no first-party documentation, but there
>> are a couple of vendor drivers for different hardware revisions[1][2],
>> and the register definitions were easy to verify empirically.
>>
>> I have tested this driver on D1 with the video engine. There is no DT
>> update patch here to avoid dependencies between series. The example in
>> the binding is what will go in the D1 DT.
>
> So such driver is needed for H616 for GPU? Or is power domain handling
> different there?
H616 does not appear to have a PPU. The PRCM gates otherwise match A100,
but there are no settable gate/reset bits at 0x17c, and the registers at
0x7001000 read as zero, even after being written. I believe H616 uses
only GPU_PWROFF_GATING_REG in the PRCM.
Regards,
Samuel
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